— Pyramid-shaped teeth around the edges of one piece of silicon (seen under an electron microscope) fit neatly into a matching set of holes on another (Image:Southampton University)
Matching sets of teeth and holes can precisely align separate silicon chips, with 200-nanometre accuracy (Image:Southampton University)
Silicon wafers covered with matching patterns of Lego-like teeth and holes could aid the development of 3D electronics, say UK researchers.
The vast majority of modern electronics are etched onto flat silicon wafers and increasing their speed normally involves squeezing more components onto the same surface area.
Now researchers are trying a different approach, by building electronics in three dimensions, typically by layering individual silicon wafers on top of one another.
Prototype 3D devices such as MIT's seven-layer turbine-on-a-chip (see Miniature jet engines could power cell phones) are currently assembled using a machine that lines them up visually, using cameras to line-up markers on the surface of different wafers. Accuracy is crucial as the electronic components on each chip must be carefully aligned up in order to function together properly.
Michael Kraft, Mark Spearing and Liudi Jiang at the University of Southampton, UK, have developed wafers fitted with matching sets of pegs and holes, resembling those found on Lego bricks. Tests suggest that this could provide a better construction method as microscopic features are more accurately lined up.
"Our technique is simpler and uses standard silicon processing equipment," says Kraft. He and colleagues tested their stackable electronics using two silicon chips, each 2 centimetre to a side.
Ten tiny pyramids are positioned along each edge of one of the wafers on the underside of angled cantilevers (see graphic, right). These pyramids measure 500 microns wide at their base and 100 microns wide at their tip. The matching wafer has a pattern of ten square holes along each of its edges. Both features are created using acid and ion etching techniques that are standard in commercial silicon processing.
The researchers then simply lined up the edges of the two chips by hand and pressed them together. The pyramids fit neatly into the holes and the two wafers can then be permanently bonded together using 400ºC heat in a nitrogen atmosphere.
Images taken with a scanning electron microscope show that the two chips align to within 200 nanometre accuracy roughly five times better than with the camera-based technique. Kraft says the next step is to use larger silicon wafers before developing functional electronics using the technique.